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Nope. An opcode fetch cycle takes 4 clocks, but a normal read or write is only 3.That's why an instruction like LD a, (hl) takes 7 cycles. I believe the GBZ80 always takes 4, but it's more of a separate 8080 clone that borrows from the Z80 a bit than an actual Z80.


Thanks for the correction. I can't believe I've had it wrong for so many years.




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