What do you mean "no"? My comment was entirely factual.
> Firstly -march (or similar, e.g. -mcpu in LLVM land) should target a chip not individual instruction sets.
LLVM still uses -march. And no you shouldn't target a specific chip unless you know your code will only run on that chip. That's the whole point I'm making. Sometimes you do know that (in embedded situations) but often you don't. Desktop apps aren't compiled for specific chips.
> Secondly, AVX-512 alone has a handful of different extensions.
Yes but these are generally linear - if an x86 chip supports extension N it will support extension N-1 too. Not true for RISC-V.
The LLVM tools (like llc) use -mcpu. Clang mimics GCC. My point about the specific chip is that you have to know it anyway if you're planning on targeting a combination of extensions so you might as well use it.
As for linearity, the "generally" bit will apply to RISC-V by the time we have real desktop class chips using the ISA. We still can't assume AVX support for most programs, I don't view this as any different to RISC-V extensions. Just this ~year Intel added VEX-coded AI NN acceleration instructions, I assume RISC-V has similar plans.
> Firstly -march (or similar, e.g. -mcpu in LLVM land) should target a chip not individual instruction sets.
LLVM still uses -march. And no you shouldn't target a specific chip unless you know your code will only run on that chip. That's the whole point I'm making. Sometimes you do know that (in embedded situations) but often you don't. Desktop apps aren't compiled for specific chips.
> Secondly, AVX-512 alone has a handful of different extensions.
Yes but these are generally linear - if an x86 chip supports extension N it will support extension N-1 too. Not true for RISC-V.