C4 spot instances work for me at the moment. The price increase for C5 wasn't worth it as I was only seeing a 5-10% performance increase. I need to re-benchmark though.
Refer to jeffbarr's answer:
Great question! I checked in with the team and this is what they told me:
"The developer FPGA code is enclaved inside AWS FPGA Shell, to prevent malicious FPGA code from damaging the hardware and to provide the necessary protection for PCI Express and the host machine. The pin assignment of the FPGA is controlled by AWS."
And
"AWS infrastructure monitors the thermals as well and the F1 hardware was designed to sustain high power consumption to enable developers to utilize the maximal available FPGA resources and frequency."
The FPGA pins are connected to the host CPU via PCIe Gen3, 4 local DDR4 channels for each FPGA, and if you are using the f1.16xlarge, there are pins connecting between the FPGA.
Both f1.2xlarge and f1.16xlarge have NVMe SSD, attached as PCIe device to the host, and not connected directly to the FPGA. One could consider using standard linux NVMe drivers or SPDK user space drivers for high throughput and low latency data movement between the NVMe SSD and the FPGA
